504712 - ADVANCED COMPUTER ARCHITECTURE

insegnamento

ID:

504712

Durata (ore):

60

CFU:

SSD:

SISTEMI DI ELABORAZIONE DELLE INFORMAZIONI

Anno:

2024

Periodo di attività

Primo Semestre (30/09/2024 - 20/01/2025)

Obiettivi Formativi

The course describes the architecture of modern processors and multi-processors and introduces the principles of parallel programming. The student will understand the principle of operation of current processors and will be able to assess the distinctive features of general purpose vs embedded microprocessors vs special purpose accelerators (GPUs & tensor flow processors). The emerging multi-core paradigm, the associated shared-memory architecture will be discussed, as well as distributed memory one. The latter will be the basis for a parallel programming project to be developed in MPI.
The Google Cloud platform will be used for instantiating VMs with enough cores to effectively test the parallel project.

Prerequisiti

Basic understanding of computer architecture: Von-Neumann machine, CU, busses, memory architecture and addressing modes. Elementary assembly language. Knowledge of the MIPS architecture and instruction set. Basic notions on operating systems: process, thread, mutual exclusion. The C-language is required for the programming lab and associated project.

Metodi didattici

Lectures (hours/year in lecture theatre): 32. Practical class (hours/year in lecture theatre): 12. Practicals / Workshops (hours/year in a lab): 18.
Lectures are delivered through presentations posted on the course web site.

Verifica Apprendimento

The final assessment consists of a parallel programming project, of a discussion of the project and of a written test (oral examination is optional). Written test and project each weight 50% in final grade. They can be taken in any order and separately. The project should be prepared by a group of two persons at the most. While the written test can be taken by each individual, project delivery and discussion must be taken by all participant in the group.

Testi

1) Ferretti, D. Gunetti. Course charts (in pdf). available for download form the course website
2) J. L. Hennessy & D. A. Patterson. Computer Architecture: A Quantitative Approach, 3rd - 4rth and 5th editions. Elsevier - Morgan Kaufmann. See detailed instructions on the course website for editions and chapters to be used.
3) D. A. Patterson & J. L. Hennessey. Computer Organization and Design: The Hardware/Software Interface, Revised 4th Edition. Morgan Kauffman. See deteiled instruction in the Course website for chapters to be used.

Contenuti

The course is split into two major areas: a description of the architectures and a laboratory on parallel programming. Part I -The processor. This part of the course introduces the basic concepts underlining the design of modern processors. The Instruction Set Architecture (ISA). A Taxonomy for ISAs: CISC, RISC, general purpose, embedded, multimedia, thread & tensors. Basic pipelining: control, hazards, exceptions. Superscalar pipelines: static multiple issue, the VLIW approach. Dynamic scheduling, speculative execution. Compiler support and software optimization. Caches and memory hierarchy: locality. Structure and organization: direct mapping, associativity. Pipelined and multi-level caches. Part II - Multi-processors. A review of multi-processors and parallel architectures, with emphasis on multi-core processors. Parallel processing: SIMD, MIMD, data parallelism, thread parallelism, coarse-grain parallelism. Parallel architectures: shared-memory, distributed memory, clusters. GPU and tensors flow architectures. Part III - Parallel programming. An introduction to parallel processing, with hands-on lab on MPI. The available paradigms: SMP, MPI, graphics and CUDA. The OpenMp standard

Lingua Insegnamento

INGLESE

Altre informazioni

Free access for a limited amount of computing resources to the Google Cloud Platform will be made available to registered students to develop the final project. Credential will be distributed in due time, must be activated within two months, and expired in 12 months from activation.