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A 200-Ms/s 10-mW switched-capacitor filter in 0.5µm CMOS technology

Articolo
Data di Pubblicazione:
2000
Abstract:
Wideband amplifiers with low but precisely known dc gain allow the achievement of accurate infinite impulse response switched-capacitor (SC) filters operating at very high sampling frequencies. The low and precise opamp gain value is taken into account while sizing the capacitors (precise opamp gain (FOG) approach), so that no idle phase is required for amplitude error compensation and double-sampling technique can be implemented. In a 0.5-μm standard CMOS technology with 3.3-V power supply, an opamp is designed which exhibits a settling time of about 3 ns (for 0.1% settling accuracy) in a closed-loop configuration with input, feedback, and load capacitors of 0.5 pF, white the slew rate is 1 V/ns. The open-loop dc gain of the amplifier is set to the value of 80 (38 dB) by a gain-control closed loop, which guarantees an accuracy of ±2%. The proposed solution is validated by experimental results from a 200-Ms/s SC filter. From a single 3.3-V supply the filter consumes 10 mW (excluding clock generation) and exhibits a -40 dB total harmonic distortion for a 2-Vpp signal amplitude at 4 MHz, achieving a 62-dB dynamic range
Tipologia CRIS:
1.1 Articolo in rivista
Keywords:
CMOS ANALOGUE INTEGRATED CIRCUITS; IIR FILTERS; CIRCUIT FEEDBACK; ERROR COMPENSATION; HARMONIC DISTORTION; SWITCHED CAPACITOR FILTERS; WIDEBAND AMPLIFIERS; 0.5 MICRON; 0.5 PF; 10 MW; 3 NS; 3.3 V; 38 DB; 4 MHZ; CMOS TECHNOLOGY; AMPLITUDE ERROR COMPENSATION
Elenco autori:
Baschirotto, Andrea; F., Severi; Castello, Rinaldo
Link alla scheda completa:
https://iris.unipv.it/handle/11571/105088
Pubblicato in:
IEEE JOURNAL OF SOLID-STATE CIRCUITS
Journal
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