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A 0.18um CMOS Selective Receiver Front-end for UWB applications

Articolo
Data di Pubblicazione:
2006
Abstract:
This paper addresses the problem of 5–6-GHz WLAN
interferer rejection in a direct-conversion receiver front-end for
multi-band orthogonal frequency division multiplexing (OFDM)
ultra-wideband (UWB) applications. The IC, realized in a 0.18- um
CMOS technology, comprises a single-ended voltage–voltage feedback
low-noise amplifier (LNA) and a quadrature mixer. The
LNA employs a double-peak single-notch network in the output
load, amplifying UWB groups #1 and #3, while rejecting WLAN
interferes in the 5–6-GHz frequency range. The mixer, based on a
merged quadrature topology, also realizes a second-order low-pass
filtering.
Fabricated dies have been bonded on PCB for characterization.
The front-end, drawing 10 mA from 1.8 V, achieves a 1-dB gain
desensitization with a 6.5-dBm interferer power at 5.5 GHz.
Other measured performances are 5.2-dB and 7.7-dB minimum
and maximum noise figure (NF), 3.5-dBm minimum IIP3 and
+34.5-dBm minimum in-band IIP2 and +21-dBm out-of-band
IIP2.
Tipologia CRIS:
1.1 Articolo in rivista
Keywords:
UWB; front-end; CMOS
Elenco autori:
G., Cusmai; M., Brandolini; P., Rossi; Svelto, Francesco
Autori di Ateneo:
SVELTO FRANCESCO
Link alla scheda completa:
https://iris.unipv.it/handle/11571/116334
Pubblicato in:
IEEE JOURNAL OF SOLID-STATE CIRCUITS
Journal
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