Data di Pubblicazione:
2011
Abstract:
Biometric identification systems exploit automated methods of recognition based on physiological or
behavioural characteristics. Among these, fingerprints are very reliable as biometric identifiers. In order
to build embedded systems performing real-time authentication, a fast computational unit for image processing
is required. In this paper we propose a parallel architecture that efficiently implements the high
computationally demanding core of a matching algorithm based on Band-Limited Phase Only spatial Correlation
(BLPOC), performed by two concurrent computational units implemented onto a Stratix II Altera
family FPGA. The device here described is competitive with similar hardware solutions described in literature
and outperforms the elaboration capabilities of general-purpose processors.
Tipologia CRIS:
1.1 Articolo in rivista
Keywords:
Multiple-processor systems
Algorithms implemented in hardware
Field programmable gate arrays
Real-time and embedded systems
Biometric authentication
Elenco autori:
Danese, Giovanni; Giachero, Mauro; Leporati, Francesco; Nazzicari, NELSON DAVIDE
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