A ratio-independent algorithmic analog-to-digital conversion technique

An aIgoritbmic analog-to-digital conversion technique is described
which is capable of achieving high-resolution conversion without
the use of matched capacitors in an MOS technology. The exact integral
multiplication of the signal required by the conversion is realized through
an algorithmic circuit method which involves charge summing with an
MOS integrator and exchange of capacitors. A first-order cancellation of
the charge injection effect from MOS transistor switches is attained with a
combination of differential circuit implementation and an optimum timing
scheme. An experimental prototype has been fabricated with a standard 5
wm n-well CMOS process. It achieves 12 bit resolution at a sampling rate
of 8 kHz. The anafog chip area measures 2400 mils2.