A 3D Vertically Integrated Deep N-Well CMOS MAPS for the SuperB Layer0

Academic Article

Publication Date:

2011

Iris type:

1.1 Articolo in rivista

Keywords:

vertical integration technologies; MAPS CMOS; low noise design; vertex detectors

List of contributors:

Authors of the University:

RATTI LODOVICO

Handle:

Published in:

Journal

URL