2D and 3D CMOS MAPS with high performance pixel-level signal processing

Articolo
Data di Pubblicazione:
2011
Tipologia CRIS:
1.1 Articolo in rivista
Keywords:
Vertical integration CMOS technologies; MAPS; low-noise front-end; selective readout architecture
Elenco autori:
Autori di Ateneo:
Link alla scheda completa:
https://iris.unipv.it/handle/11571/215807
Pubblicato in:
NUCLEAR INSTRUMENTS & METHODS IN PHYSICS RESEARCH. SECTION A, ACCELERATORS, SPECTROMETERS, DETECTORS AND ASSOCIATED EQUIPMENT
Journal