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A Quasi-Passive 78-dB DR 14.9-W Noise-Shaping SAR A/D Converter for Audio Activity Detection Applications

Academic Article
Publication Date:
2025
abstract:
In this paper, a Noise-Shaping Successive Approximation Register (NS-SAR) Analog-to-Digital Converter (ADC) optimized for low-power Audio Activity Detection (AAD) is presented. Based on a 5-bits bottom-sampled CDAC synchronous SAR architecture, the proposed converter exploits a second-order error-feedback loop filter and a fully passive Charge-Sharing (CS) summing node to enhance the final resolution and improve power efficiency. An open-loop Process-Voltage-Temperature (PVT) insensitive amplifier is employed in the feedback loop to compensate for the CS losses, ensuring a 78-dB dynamic range and a 165.3-dB Schreier Figure-of-Merit (FoMs) of the converter. Fabricated in a 65-nm BCD process, the ADC core occupies only 0.129 mm2 and consumes 14.9 µW from a 1.2-V supply.
Iris type:
1.1 Articolo in rivista
Keywords:
Analog-to-digital converter (ADC); audio activity detection (AAD); capacitive digital-to-analog (CDAC); charge sharing (CS); dynamic range (DR); loop filter (LF); noise shaping (NS); successive approximation register (SAR)
List of contributors:
Tambussi, Marco; Grassi, Marco; Rocca, Gino; Valle, Stefano; Grandi, Matteo; Bonizzoni, Edoardo; Malcovati, Piero
Authors of the University:
BONIZZONI EDOARDO
GRASSI MARCO
MALCOVATI PIERO
Handle:
https://iris.unipv.it/handle/11571/1533057
Published in:
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. II, EXPRESS BRIEFS
Journal
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