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A Sub-1-V, 350-uW, 6.5-dB Integrated NF Low-IF Receiver Front-End for IoT in 28-nm CMOS

Articolo
Data di Pubblicazione:
2019
Abstract:
This letter presents a highly efficient low-intermediate frequency receiver front-end for Internet-of-Things applications. The lownoise trans-impedance amplifier (LNTA) combines a transformer-based network for scaling up the source impedance together with passive gmboosting and current-reuse techniques to achieve better noise and 12× current saving compared with a common-gate (CG) stage. A complex channel-selection filter with center frequency and passband of 2 and 1.4 MHz, respectively, is implemented after the passive mixer with a gmboosted CG stage. Built in 28-nm CMOS, the proposed receiver occupies an active area of 0.1 mm 2 , it is supplied with 0.9 V and consumes only 350 μW, while showing a minimum NF of 6.2 dB at the channel of interest. The RF performance of the proposed receiver is very competitive with the state-of-the-art ultralow-power receivers, while it consumes the lowest power.
Tipologia CRIS:
1.1 Articolo in rivista
Keywords:
Receivers, Noise measurement, Impedance, Power demand, Transistors, Internet of Things, Gain
Elenco autori:
Kargaran, Ehsan; Guo, Benqing; Manstretta, Danilo; Castello, Rinaldo
Autori di Ateneo:
MANSTRETTA DANILO
Link alla scheda completa:
https://iris.unipv.it/handle/11571/1315086
Pubblicato in:
IEEE SOLID-STATE CIRCUITS LETTERS
Journal
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URL

https://ieeexplore.ieee.org/document/8718256
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